# SCUT-digital-logic-experiment

**Repository Path**: LINGYUNXINGZHE/SCUT-digital-logic-experiment

## Basic Information

- **Project Name**: SCUT-digital-logic-experiment
- **Description**: SCUT软院数字逻辑实验工程文件
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: main
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2024-07-07
- **Last Updated**: 2024-07-07

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# SCUT软院数字逻辑实验